UNIVERSAL LOGIC ARRAY

Domain	Definition
Electrical Engineering	A semicustom ASIC circuit based on an array of simple cells surrounded by an interconnection network, including programmable crosspoints of switches(RAM or SRAM). Source: European Union. (references)
Source: compiled by the editor from various references; see credits.

Language		Translations for "UNIVERSAL LOGIC ARRAY"; alternative meanings/domain in parentheses.
Dutch		programmeerbare gate array (master slice, programmable gate array). (various references)

Finnish		ohjelmoitava porttimatriisi (field programmable gate array, FPGA, master slice, programmable gate array). (various references)

French		réseau prédiffusé, PGA. (various references)

German		programmierbares Gate-Array (master slice, programmable gate array). (various references)

Pig Latin		iversalunay ogiclay arrayay

Swedish		programmerbar grindmatris (master slice, programmable gate array). (various references)
Source: compiled by the editor from various translation references.

Specialty Definition: UNIVERSAL LOGIC ARRAY