Copyright © Philip M. Parker, INSEAD. Terms of Use.

C --   Ca  Cb  Cc  Cd  Ce  Cf  Cg  Ch  Ci    Ck  Cl  Cm  Cn  Co  Cp    Cr  Cs  Ct  Cu  Cv  Cw  Cx  Cy  Cz

 

CPAP HUMIDIFIER HAVING SLIDING ACCESS DRAWER
CPAP NOSE MASK
CPAP PRESSURE AND FLOW TRANSDUCER
CPC GENE FOR REGULATING INITIATION OF ROOT HAIR FORMATION FOR ARABIDOPSIS (THALIANA) AND TRANSGENIC (ARABIDOPSIS), PLANT OVEREXPRESSING THE CPC GENE
CPE ALERT SIGNAL DETECTOR AND CALLER IDENTIFICATION DETECTOR USING PEAK DETECTION
CPE ALERT SIGNAL TONE DETECTOR
CPI INFINITE AND FINITE ANALYSIS
CPLD HIGH SPEED PATH
CPLD SCALABLE AND ARRAY ARCHITECTURE
CPLD SERIAL PROGRAMMING WITH EXTRA READ REGISTER
CPP GMR DEVICE WITH INVERSE GMR MATERIAL
CPP MAGNETORESISTIVE DEVICE AND METHOD FOR MAKING SAME
CPP MAGNETORESISTIVE DEVICE WITH REDUCED EDGE EFFECT AND METHOD FOR MAKING SAME
CPP MAGNETORESISTIVE SENSORS WITH IN-STACK LONGITUDINAL BIASING AND OVERLAPPING MAGNETIC SHIELD
CPP SENSOR WITH DUAL SELF-PINNED AP PINNED LAYER STRUCTURES
CPP SPIN-VALVE DEVICE
CPR ASSIST DEVICE WITH PRESSURE BLADDER FEEDBACK
CPR BACKBOARD AND METHOD OF USE
CPR BARRIER DEVICE
CPR CHEST COMPRESSION MONITOR
CPR COMPUTER AIDING
CPR DEVICE
CPR DEVICE AND METHOD WITH STRUCTURE FOR INCREASING THE DURATION AND MAGNITUDE OF NEGATIVE INTRATHORACIC PRESSURES
CPR DEVICE HAVING VALVE FOR INCREASING THE DURATION AND MAGNITUDE OF NEGATIVE INTRATHORACIC PRESSURES
CPR DEVICE WITH COUNTERPULSION MECHANISM
CPR DUMP MANIFOLD
CPR FACE MASK
CPR FACE MASK WITH FILTER PROTECTED FROM PATIENT-EXPIRED CONDENSATE
CPR MANIKIN (PISTON)
CPR MANIKIN AND DISPOSABLE LUNG BAG
CPR MANIKIN WITH OPTIONAL AUTOMATIC EXTERNAL DEFIBRILLATION
CPR MANNEQUIN
CPR PROMPTING APPARATUS
CPR PROTECTOR
CPR SAFETY DEVICE
CPR TRAINING MANIKIN
CPU ACTIVITY MONITORING THROUGH CACHE WATCHING
CPU ADAPTER FOR A MOTHERBOARD TEST MACHINE
CPU AND CIRCUIT BOARD MOUNTING ARRANGEMENT
CPU AND HEAT SINK MOUNTING ARRANGEMENT
CPU ARCHITECTURE PERFORMING DYNAMIC INSTRUCTION SCHEDULING AT TIME OF EXECUTION WITHIN SINGLE CLOCK CYCLE
CPU BUS ALLOCATION CONTROL
CPU CAPABLE OF MODIFYING BUILT-IN PROGRAM CODES THEREOF AND METHOD FOR THE SAME
CPU CARD MOUNTING STRUCTURE
CPU CASING STRUCTURE WITH IMPROVED HEAT DISSIPATOR ANCHORING CONFIGURATION
CPU CLOCK CONTROL UNIT
CPU CLOCK GENERATOR HAVING A LOW FREQUENCY OUTPUT DURING I/O OPERATIONS AND A HIGH FREQUENCY OUTPUT DURING MEMORY OPERATIONS
CPU CONTROLLED APPARATUS FORMED ON AN IC
CPU CONTROLLED MEMORY CONTROLLING DEVICE FOR ACCESSING OPERATIONAL INFORMATION
CPU COOLER
CPU COOLING ARRANGEMENT
CPU COOLING ARRANGEMENT FOR PORTABLE COMPUTER
CPU COOLING DEVICE USING THERMO-SIPHON
CPU COOLING DEVICE WITH A MOUNTING MECHANISM
CPU COOLING FAN MOUNTING STRUCTURE
CPU COOLING STRUCTURE
CPU COOLING SYSTEM
CPU CORE TO BUS SPEED RATIO DETECTION
CPU CORE VOLTAGE SWITCHING CIRCUIT
CPU CYCLE CONSUMPTION SELF-REGULATING METHOD AND APPARATUS
CPU DIAGNOSING DEVICE AND METHOD
CPU DISSIPATOR MOUNTING APPARATUS
CPU EASY ACCESS PANELS
CPU ESCALATING ADAPTER WITH MULTIVOLTAGE AND MULTIPLE FREQUENCY SELECTION
CPU EXPANDABILITY BUS
CPU EXPANSIVE GRADATION OF I/O INTERRUPTION SUBCLASS RECOGNITION
CPU FAN ASSEMBLY
CPU HAVING PIPELINED INSTRUCTION UNIT AND EFFECTIVE ADDRESS CALCULATION UNIT WITH RETAINED VIRTUAL ADDRESS CAPABILITY
CPU HEAT DISSIPATING APPARATUS
CPU HEAT DISSIPATING DEVICE
CPU HEAT DISSIPATING DEVICE WITH AIRGUIDING UNITS
CPU HEAT DISSIPATING FAN DEVICE
CPU HEAT DISSIPATION DEVICE WITH SPECIAL FINS
CPU HEAT DISSIPATOR
CPU HEAT DISSIPATOR HOOK-UP APPARATUS
CPU HEAT DISSIPATOR HOOK-UP DEVICE
CPU HEAT EXCHANGER
CPU HEAT SINK
CPU HEAT SINK ASSEMBLY
CPU HEAT SINK ATTACHMENT
CPU HEAT SINK CLAMPING DEVICE
CPU HEAT SINK FASTENER
CPU HEAT SINK FASTENING DEVICE
CPU HEAT SINK HOLDING-DOWN DEVICE
CPU HEAT SINK MOUNTING ARRANGEMENT
CPU HEAT SINK MOUNTING STRUCTURE
CPU HOLDER
CPU IMPLEMENTED METHOD FOR BACKING UP MODIFIED DATA SETS IN NON-VOLATILE STORE FOR RECOVERY IN THE EVENT OF CPU FAILURE
CPU INTERCONNECT SYSTEM FOR A COMPUTER
CPU LOCK LOGIC FOR CORRECTED OPERATION WITH A POSTED WRITE ARRAY
CPU MODE SWITCHING CIRCUIT CHANGING OPERATION MODE RESPONSIVE TO A POWER ON RESET SIGNAL AND AN EXTERNAL RESET SIGNAL
CPU MODULE FOR COMPACTPCI-BASED COMPUTER
CPU MODULE MOUNTING RACK
CPU MOUNTING UNIT
CPU OVER-HEAT PROTECTION DETECTION DEVICE
CPU PIPELINE HAVING QUEUING STAGE TO FACILITATE BRANCH INSTRUCTIONS
CPU PLUG-AND-PLAY METHOD AND DEVICE
CPU POWER ADJUSTMENT METHOD
CPU POWER MANAGEMENT IN NON-APM SYSTEMS
CPU RADIATING FLANGE MOUNTING DEVICE
CPU RADIATOR ASSEMBLY
CPU READS DATA FROM SLOW BUS IF I/O DEVICES CONNECTED TO FAST BUS DO NOT ACKNOWLEDGE TO A READ REQUEST AFTER A PREDETERMINED TIME INTERVAL
CPU RESET CIRCUIT
CPU SET-UP KEY FOR CONTROLLING MULTIPLE CIRCUITS
CPU SOCKET ASSEMBLY WITH PICK UP CAP
CPU SOCKET CONNECTOR
CPU SOCKET HAVING SEPARATE RETENTION MEMBER
CPU SOCKET WITH ENHANCED BASE STRUCTURE
CPU STEPPING AND PROCESSOR FIRMWARE MATCHING MECHANISM
CPU SUPPORTING ASSEMBLY
CPU SYSTEM WITH HIGH-SPEED PERIPHERAL LSI CIRCUIT
CPU UNIT AND RUN ALTERNATIVE CONTROL METHOD OF PROGRAMMABLE CONTROLLER
CPU WITH DSP FUNCTION PREPROCESSOR HAVING LOOK-UP TABLE FOR TRANSLATING INSTRUCTION SEQUENCES INTENDED TO PERFORM DSP FUNCTION INTO DSP MACROS
CPU WITH DSP FUNCTION PREPROCESSOR HAVING PATTERN RECOGNITION DETECTOR THAT USES TABLE FOR TRANSLATING INSTRUCTION SEQUENCES INTENDED TO PERFORM DSP FUNCTION INTO DSP MACROS
CPU WITH DSP HAVING DECODER THAT DETECTS AND CONVERTS INSTRUCTION SEQUENCES INTENDED TO PERFORM DSP FUNCTION INTO DSP FUNCTION IDENTIFIER
CPU WITH DSP HAVING FUNCTION PREPROCESSOR THAT CONVERTS INSTRUCTION SEQUENCES INTENDED TO PERFORM DSP FUNCTION INTO DSP FUNCTION IDENTIFIER
CPU WITH INTEGRATED MULTIPLY/ACCUMULATE UNIT
CPU WRITE-BACK CACHE COHERENCY MECHANISM THAT TRANSEERS DATA FROM A CACHE MEMORY TO A MAIN MEMORY BEFORE ACCESS OF THE MAIN MEMORY BY AN ALTERNATE BUS MASTER
CPU WRITE-BACK CACHE COHERENCY MECHANISM THAT TRANSFERS DATA FROM A CACHE MEMORY TO A MAIN MEMORY AFTER ACCESS OF THE MAIN MEMORY BY AN ALTERNATIVE BUS MASTER
CPU, MEMORY CONTROLLER, BUS BRIDGE INTEGRATED CIRCUITS, LAYOUT STRUCTURES, SYSTEM AND METHODS
CPU-BUS CONTROLLER FOR ACCOMPLISHING TRANSFER OPERATIONS BETWEEN A CONTROLLER AND DEVICES COUPLED TO AN INPUT/OUTPUT BUS
CPU-CONTROLLED GARBAGE-COLLECTING MEMORY MODULE
CPU-CYCLE STEALING FOR MULTI-TASKING OPERATING SYSTEM
CPU-INDEPENDENT AND DEVICE-DRIVER TRANSPARENT SYSTEM FOR TRANSLATING A COMPUTER'S INTERNAL BUS SIGNALS ONTO AN INTERMEDIATE BUS AND FURTHER TRANSLATING ONTO AN EXPANSION BUS
CPU-PERIPHERAL BUS INTERFACE USING BYTE ENABLE SIGNALING TO CONTROL BYTE LANE STEERING
CPVC COMPOUNDS AND ARTICLES MADE THEREFROM FOR DESIGN STRESS RATING ABOVE 180.DEGREE. C.
CPVC COMPOUNDS AND ARTICLES MADE THEREFROM FOR DESIGN STRESS RATING ABOVE 180.DEGREE. F.

Inventions Browse

   a  b  c  d  e  f  g  h  i  j  k  l  m  n  o  p  q  r  s  t  u  v  w  x  y  z
A --   Aa  Ab  Ac  Ad  Ae  Af  Ag  Ah  Ai  Aj  Ak  Al  Am  An  Ao  Ap  Aq  Ar  As  At  Au  Av  Aw  Ax  Ay  Az
B --   Ba  Bb  Bc  Bd  Be  Bf  Bg  Bh  Bi  Bj    Bl  Bm  Bn  Bo  Bp    Br  Bs  Bt  Bu    Bw  Bx  By  
C --   Ca  Cb  Cc  Cd  Ce  Cf  Cg  Ch  Ci    Ck  Cl  Cm  Cn  Co  Cp    Cr  Cs  Ct  Cu  Cv  Cw  Cx  Cy  Cz
D --   Da  Db  Dc  Dd  De  Df    Dh  Di  Dj  Dk  Dl  Dm  Dn  Do  Dp  Dq  Dr  Ds  Dt  Du  Dv  Dw  Dx  Dy  
E --   Ea  Eb  Ec  Ed  Ee  Ef  Eg  Eh  Ei  Ej  Ek  El  Em  En  Eo  Ep  Eq  Er  Es  Et  Eu  Ev    Ex  Ey  Ez
F --   Fa  Fb  Fc  Fd  Fe  Ff  Fg  Fh  Fi    Fk  Fl  Fm    Fo  Fp    Fr  Fs  Ft  Fu  Fv    Fx  Fy  
G --   Ga  Gb  Gc  Gd  Ge  Gf    Gh  Gi      Gl  Gm  Gn  Go  Gp    Gr  Gs  Gt  Gu  Gv      Gy  
H --   Ha  Hb  Hc  Hd  He  Hf  Hg  Hh  Hi    Hk  Hl  Hm  Hn  Ho  Hp    Hr  Hs  Ht  Hu  Hv      Hy  Hz
I --   Ia  Ib  Ic  Id  Ie  If  Ig    Ii    Ik  Il  Im  In  Io  Ip  Iq  Ir  Is  It  Iu  Iv        
J --   Ja    Jc    Je  Jf      Ji  Jj      Jm    Jo  Jp      Js  Jt  Ju          
K --   Ka    Kc  Kd  Ke    Kg    Ki      Kl    Kn  Ko      Kr  Ks  Kt  Ku  Kv  Kw    Ky  
L --   La  Lb  Lc  Ld  Le  Lf  Lg  Lh  Li    Lk  Ll  Lm  Ln  Lo  Lp    Lr  Ls  Lt  Lu  Lv  Lw  Lx  Ly  Lz
M --   Ma  Mb  Mc  Md  Me  Mf  Mg  Mh  Mi      Ml  Mm  Mn  Mo  Mp    Mr  Ms  Mt  Mu  Mv  Mw  Mx  My  
N --   Na  Nb  Nc  Nd  Ne  Nf  Ng  Nh  Ni    Nk  Nl  Nm  Nn  No  Np  Nq  Nr  Ns  Nt  Nu  Nv  Nw  Nx  Ny  
O --   Oa  Ob  Oc  Od  Oe  Of  Og  Oh  Oi    Ok  Ol  Om  On  Oo  Op  Oq  Or  Os  Ot  Ou  Ov  Ow  Ox  Oy  Oz
P --   Pa  Pb  Pc  Pd  Pe  Pf  Pg  Ph  Pi    Pk  Pl  Pm  Pn  Po  Pp  Pq  Pr  Ps  Pt  Pu  Pv  Pw    Py  Pz
Q --   Qa    Qc      Qf      Qi        Qm    Qo  Qp    Qr  Qs  Qt  Qu    Qw      
R --   Ra  Rb  Rc  Rd  Re  Rf  Rg  Rh  Ri  Rj    Rl  Rm  Rn  Ro  Rp    Rr  Rs  Rt  Ru  Rv    Rx  Ry  Rz
S --   Sa  Sb  Sc  Sd  Se  Sf  Sg  Sh  Si    Sk  Sl  Sm  Sn  So  Sp  Sq  Sr  Ss  St  Su  Sv  Sw    Sy  
T --   Ta  Tb  Tc  Td  Te  Tf  Tg  Th  Ti    Tk  Tl  Tm  Tn  To  Tp    Tr  Ts  Tt  Tu  Tv  Tw  Tx  Ty  
U --   Ua  Ub  Uc  Ud  Ue  Uf    Uh  Ui    Uk  Ul  Um  Un  Uo  Up    Ur  Us  Ut    Uv  Uw      Uz
V --   Va  Vb  Vc  Vd  Ve    Vg  Vh  Vi      Vl  Vm  Vn  Vo  Vp    Vr  Vs  Vt  Vu      Vx    Vz
W --   Wa  Wb  Wc  Wd  We  Wf    Wh  Wi          Wn  Wo      Wr  Ws  Wt  Wu  Wv  Ww    Wy  
X --   Xa  Xb    Xd  Xe        Xi        Xm    Xo  Xp                  Xy  
Y --   Ya  Yb  Yc    Ye  Yf    Yh  Yi        Ym    Yo        Ys  Yt  Yu    Yw      Yz
Z --   Za    Zc  Zd  Ze        Zi          Zn  Zo  Zp    Zr  Zs      Zv  Zw    Zy  

 

Copyright © Philip M. Parker, INSEAD. Terms of Use.